let’s break down practical 5 V over-voltage protection (OVP) options and how to size them, centered on three popular approaches: using (1) a voltage-regulator-style series pass element, (2) a BJT (“transistor”) circuit, and (3) a MOSFET. I’ll give you quick reference schematics (described in words), trip-point math, pros/cons, and a ready-to-build example for each.

0) First, define your target

• Nominal rail: 5.0 V

• Allowable steady max at the load: e.g., ≤ 5.5 V

• Trip (cut-off) threshold: pick a margin: common is 5.7–6.0 V

• Load current: design for your worst case (examples below use 2 A)

• Protection style:

  • Clamp (shunt energy away, load still sees stress but limited)

  • Crowbar (short the rail to blow a fuse/reset a polyfuse)

  • Series cutoff (disconnect the load—best for sensitive electronics)

For 5 V logic, series cutoff is usually the safest and least stressful.

1) “Voltage-regulator style” Series Pass (LDO/eFuse approach)

What it is

A series element (LDO pass transistor or dedicated eFuse) sits in-line with the 5 V rail. A comparator/threshold circuit turns it off when input exceeds the limit.

Implementation A: Use a true eFuse / power switch IC

• Behavior: fast OV detect (e.g., 5.6 V), disconnects the load, often adds current limit, soft-start, and reverse protection.

• Pros: minimal design risk, tiny BOM, repeatable thresholds, built-in SOA handling.

• Cons: IC cost; still dissipates some heat under normal load.

(If you want part suggestions just say your current & features—auto-retry vs latch, reverse-block, etc.—and I’ll shortlist a few.)

Implementation B: DIY with TL431 + P-channel MOSFET (cheap & precise)

Schematic (words):

• High-side P-MOSFET: Source→Input 5 V, Drain→Load, Body diode from Load→Input (so pick a “reverse-blocking” variant or arrange back-to-back if you need reverse-polarity protection).

• Gate pulled up to Source with R_GUP (keeps FET normally ON).

• TL431 (2.495 V ref) monitors VIN through a divider (R_TOP to VIN, R_BOT to GND).

• TL431 Cathode → MOSFET Gate (through a resistor); Anode → GND.

• When VIN > VTRIP, TL431 conducts, pulling the gate toward ground? That turns P-FET on, which is the opposite of what we want. So invert:

  • Add a small NPN between Gate and Source. TL431 drives the NPN, which pulls gate up to source (V_GS≈0) → FET OFF during over-voltage.

Trip math:
For TL431: V_trip=V_ref(1+R_TOP/R_BOT) with V_ref≈2.495.
Example V_trip = 5.8 V → R_TOP/R_BOT=5.8/2.495−1≈1.325.
Pick R_BOT=10 kΩ → R_TOP≈13.3 kΩ (use 13 kΩ + tweak).
Add hysteresis (a 1 MΩ from TL431 cathode to the divider node) to avoid chatter ~20–60 mV.

Sizing tips:

• Choose P-FET with low R_DS(ON) (e.g., ≤ 15 mΩ @ V_GS=−4.5 V) to keep losses low:
  P≈I²⋅R. For 2 A and 15 mΩ → 60 mW.

• Gate network: R_GUP ~100 kΩ; TL431 cathode-to-gate resistor 1–4.7 kΩ; NPN base resistor 10–33 kΩ.

• Add a TVS on input if the source can spike (USB-C adapters, cable transients).

Pros: Accurate, low part cost, clean cutoff, scalable.
Cons: Slight complexity; need careful gate-drive polarity.

2) BJT-based OVP (classic crowbar or series cutoff)

A) Crowbar (Zener + SCR/Thyristor or Zener + BJT “slam”)

Schematic (words):

• A zener diode senses VIN. Above its knee, it triggers an SCR (or a saturated NPN pair) that shorts the rail. Upstream fuse/polyfuse opens.

• Set the zener around 5.6–6.2 V (consider tolerance & temp).

Pros: Extremely fast; protects even if the series element fails short.
Cons: Your system hard-resets; must have a fuse; not for battery-only feeds (you’ll just dump current).

B) BJT series cutoff (inexpensive)

Schematic (words):

• High-side PNP as the pass element (or NPN low-side if you can tolerate ground lift).

• A zener + resistor network feeds the base; when VIN rises above zener+V_BE, the PNP turns off.

• Add an emitter resistor for current sensing if you want dual OCP/OVP.

Pros: Cheap, easy; no body-diode direction issues like a P-MOS.
Cons: Higher dropout than MOSFET (V_CE(sat) > R_DS(ON)·I), more heat; worse efficiency.

Quick calc (series cutoff):

• Choose zener V_Z​ and base divider so turn-off occurs at desired V_trip.

• Ensure base current during OV is enough to fully cut the pass device (consider β and load).

3) MOSFET-only OVP (fast & efficient)

A) Simple zener-gated P-MOSFET cutoff

Schematic (words):

• P-MOSFET high-side; gate pulled down (ON) via resistor to ground through a small NPN; gate pulled up to source (OFF) with another resistor.

• A zener from VIN to NPN base turns the NPN off once VIN exceeds V_Z+V_BE​, letting the gate float up to source → MOSFET OFF.

• With proper polarity, you can avoid the NPN and use a precision zener (or TLVH431) to hold |V_GS| within safe limits and force OFF above the threshold.

Pros: Lowest loss in normal operation; very fast cutoff; simple BOM.
Cons: Zener tolerances and tempco shift the threshold; add trim or use TL431 for precision.

B) Back-to-back N-MOS “ideal diode” with comparator

Schematic (words):

• Two N-MOSFETs source-to-source form a bidirectional off switch (blocks both polarities).

• A comparator/reference (or TL431 + small BJT) pulls the gate driver low when VIN > VTRIP to turn both MOSFETs off.

• Add a gate clamp (transorb or zener) to protect V_GS.

Pros: Adds reverse-polarity and back-feed blocking; robust for USB-C/adapter mishaps.
Cons: Needs a little gate-drive circuitry; more parts than P-MOS alone.

4) Add a clamp anyway (TVS)

Regardless of cutoff method, place a low-cap 5 V TVS (e.g., SMB footprint) at the input. It catches fast spikes the control loop can’t. Pick one whose clamping is below what your load can tolerate (often ~9–12 V for 5 V rails—verify with your device absolute max and surge profile).

5) Worked examples (plug-and-play)

Example 1 — Precise Series Cutoff (TL431 + P-MOS, 2 A rail)

• Target: Trip at 5.8 V, nominal 5 V/2 A.

• MOSFET: P-channel, 30 V, R_DS(ON) ≤ 15 mΩ @ −4.5 V (TO-252 or PowerPAK).

• Divider: R_BOT=10kΩ, R_TOP=13.3kΩ → V_trip≈5.8V.

• Hysteresis: 1 MΩ from TL431 cathode to divider node → ~30–60 mV.

• Gate network: R_GUP (gate→source) 100 kΩ; TL431 cathode→gate 2.2 kΩ; TL431 cathode→NPN base 10 kΩ; NPN (S8050/2N3904) from gate→source; base-emitter 100 kΩ.

• TVS: 5 V nominal, SMA/SMB (low capacitance if on USB data).

• Loss @ 2 A: ~60 mW; thermal margin excellent.

Example 2 — Zener-BJT Crowbar (fast, sacrificial)

• Fuse/polyfuse upstream sized to blow/trip at, say, >2.5 A.

• Zener: 5.6 V (±5%); trigger resistor sized to deliver ~20–50 mA into the SCR gate at 6.0 V.

• SCR: Choose I_TSM to withstand inrush until the fuse opens.

• Result: Any surge above ~5.8–6.0 V forces a short → fuse opens; load saved.

Example 3 — Simple P-MOS Zener Cutoff (budget)

• P-MOS: R_DS(ON) ≤ 20 mΩ.

• Zener: 6.2 V to sense; gate clamp 12 V to protect V_GS.

• Resistors: gate pull-up to source 100 kΩ; gate pull-down via NPN as in §3A.

• Trip: ~6.0–6.4 V (zener tolerance/temperature dependent). Cheap & quick.

6) Layout & reliability checklist

• Put the TVS and the series device right at the input connector; keep the high-dI/dt loop tiny.

• Star-route the divider/TL431 ground to the load ground; keep it away from switching currents.

• Add RC snubbers across the MOSFET (or the input) if you see ringing.

• Verify SOA for hot-plug: at trip, the MOSFET might be in linear region briefly.

• If using crowbar, confirm fuse clearing time and SCR I²t.

• For USB-C or hot-swap sources, consider inrush control (gate RC or eFuse soft-start).

7) Which should you pick?

• Most designs: Series cutoff with P-MOS + TL431 (Example 1). Smooth, low-loss, precise.

• Harsh/unknown adapters, absolute safety: Add a crowbar as a secondary failsafe.

• Ultra-simple & cheap: P-MOS + zener (Example 3), accepting wider tolerance.

• Feature-rich & tiny BOM: A dedicated eFuse IC (fastest path to robust results).