Here’s a concise, engineer-focused guide to how magnetic devices are applied inside an automotive On-Board Charger (OBC)—what each part does, what to watch for, and how to size/choose them.

1) OBC power path (where magnetics live)
AC In → EMI Filter (CM choke, X/Y caps, DM choke) → PFC (boost or bridgeless totem-pole) → HV DC Link → Isolated DC/DC (LLC or PSFB) → Battery Output Filter → Vehicle HV bus
Magnetics show up in bold places:
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Input EMI: Common-mode (CM) choke, differential-mode (DM) choke.
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PFC stage: Boost inductor (or interleaved/coupled inductors in totem-pole).
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Isolation stage: High-frequency transformer (LLC or PSFB) and resonant inductor (LLC) or output filter inductors (PSFB).
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Aux supplies: Small flyback transformer for housekeeping rails.
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Sensing/communications: Current transformers/Hall cores, signal magnetics (CAN/LIN/Ethernet chokes).
2) What each magnetic component does (and key specs)
| OBC Block | Device | Purpose | Must-have specs (OBC-specific) |
|---|---|---|---|
| AC Input EMI | CM choke | Block common-mode noise back to grid | High L_CM, low leakage C, nanocrystalline/ferrite core, AEC-Q200, low audible noise, thermal class ≥125–150 °C |
| DM choke | Kill differential noise with X/Y caps | L_DM vs ripple current, low copper loss, stable across temp | |
| PFC (Boost / Totem-Pole) | Boost/Storage inductor | Energy storage, sets ripple, shapes PF | L value at f_sw, saturation at hot (B_sat↓ with T), DC bias, ΔI ripple, core loss at 65–250 kHz+, gapped ferrite or powder, litz wire |
| Coupled inductors (interleaved) | Ripple cancellation, smaller L, better transient | Tight coupling (k), matched leakage, symmetrical DCR | |
| Isolation DC/DC (LLC) | HF transformer | Reinforced isolation + transfer power | Creepage/clearance per working V (400–800 V systems), triple-insulated wire/tape system, leakage inductance target (for ZVS), low copper & core loss at 100–500 kHz (SiC/GaN), PD test, hipot margin |
| Resonant inductor (Lr) | Part of LLC tank | Often integrated via designed leakage; tolerance and temp drift tightly controlled | |
| Isolation DC/DC (PSFB) | Transformer | Isolation + conversion | Optimize leakage (snubber/ZVS window), low loss; planar recommended at high power density |
| Output filter inductors | Smooth battery current | Core with strong DC-bias tolerance (powder, gapped ferrite), low DCR, ripple/thermal balance | |
| Aux rails | Flyback transformer | 12 V/5 V housekeeping | Basic isolation, compact E/RM/PQ cores, wide input |
| Sensing | Current transformer / Hall core | Primary current feedback, protection | Wide bandwidth (CT) or DC capable (Hall), linearity, low offset drift, isolation |
| Comms | CAN/LIN/Ethernet chokes | EMI robustness | AEC-Q200, impedance @ common interference bands |
3) Materials & construction choices
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Ferrite (MnZn/NiZn): Low core loss at 50–300 kHz; use gaps for energy storage (PFC/output ind.).
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Powdered iron (Fe-Si-Al, Fe-Si): Excellent DC-bias tolerance, broader loss curve; good for output inductors.
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Nanocrystalline/Amorphous: Very high permeability; great for CM chokes (compact, high L_CM), also current transformers.
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Planar magnetics: PCB-embedded windings + low profile cores (E-/EQ-/ER-/PQ-planar). Boosts power density, repeatability, cooling via PCB copper; watch proximity losses and insulation stack-up.
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Litz wire: Reduces skin/proximity loss as you push >100 kHz with SiC/GaN. Choose strand dia to ≈ skin depth at f_sw.
4) Safety & compliance (automotive specifics)
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AEC-Q200 (passives): thermal shock, vibration, humidity, life.
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Isolation & insulation: Reinforced isolation for the transformer; creepage/clearance per working voltage, pollution degree, CTI group (follow IEC 60664-1 methodology). Use triple-insulated wire, margins or tapes; perform partial discharge tests (PDIV > worst-case).
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EMC: CISPR 25 (vehicle), ISO 7637-2 (transients), OEM specs (e.g., LV123/LV124/LV148). Magnetics must support conducted/radiated limits (design CM/DM impedance accordingly).
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Functional Safety: ISO 26262—magnetic sensors for current/voltage paths often feed safety functions (redundancy, diagnostics).
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Thermal robustness: −40…125/150 °C ratings, potting/impregnation to mitigate vibration and noise (magnetostriction).
5) Quick sizing heuristics & equations
5.1 PFC boost inductor (continuous conduction)
Target inductor ripple ΔI ≈ 20–40% of I_L at nominal line.

5.2 LLC transformer & resonant elements
Normalize to ![]()
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Choose turns ratio nn from target battery voltage range and expected gain window around f0f_0.
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Leakage inductance provides Lr; tune via spacing/shields/gaps.
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Keep magnetizing inductance Lm typically 3–8× Lr to secure ZVS and light-load behavior.
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Use core loss curves at operating flux (keep ΔB modest at high f_sw).
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For planar, estimate AC resistance (R_ac) with Dowell/IEC methods; consider interleaving for lower leakage.
5.3 Output inductor (PSFB or secondary filters)
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Choose core with good DC bias (powder/gapped ferrite), size DCR for ≤1–2% efficiency hit.
6) EMI filter strategy that actually works
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Front CM choke sized so CM impedance peaks where switching noise converts to line.
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Small DM choke + X caps (X2 at AC input, film cap across PFC) to hit DM noise.
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Y caps sized for EMI but within leakage current limits (charging standards).
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Shield/aux windings on the transformer can reduce CM emission (careful with capacitance to primary).
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Snubbers/RCD/RC-dampers tame ringing that magnetics + parasitics form.
7) Reliability & mechanical
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Potting/impregnation to reduce audible noise and improve heat spreading; verify resin coefficients to avoid cracking cores.
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Tape systems (e.g., polyimide) with certified build; margin tape for creepage on PCB edges.
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Mounting: tie-downs, glue fillets, and center-leg clamps on E/PQ cores for vibration.
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Thermal: provide copper planes/vias below planar magnetics; consider heat spreaders for >2–3 W core+copper loss.
8) Practical part selection checklist
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PFC inductor: L at bias & temp, A_L tolerance, core loss @ f_sw, litz or multi-filar, gapped ferrite (E/PQ/ER), DCR ≤ few mΩ.
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CM choke: nanocrystalline for compact size, verify saturation with inrush, temperature rise at worst ambient.
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LLC transformer: reinforced isolation, triple-insulated wire or certified tape stack, designed leakage for Lr, planar if height-limited.
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Output inductor: powder or gapped ferrite, ΔI target, thermal rise <40–50 K at full load.
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Current sense: Hall core for DC, CT for AC ripple; ensure bandwidth and linearity.
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Aux flyback: keep C_parasitic low to reduce CM coupling; shield winding if needed.
Example: 3.3 kW single-phase OBC (totem-pole + LLC)
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f_sw(PFC) = 100–140 kHz (SiC/GaN), interleaved; choose coupled inductors to halve ripple.
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f_sw(LLC) ≈ 140–220 kHz; planar transformer with targeted leakage for LrL_r, litz on discrete builds.
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CM choke ~10–30 mH (nanocrystalline) sized for current & temp; DM choke a few 10s–100s µH.
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Output inductor (if PSFB or post-filter in LLC) sized for ≤20–30% ripple at nominal battery voltage.
Common pitfalls (avoid these)
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Using catalog L at 25 °C—inductor saturates hot at low line.
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Ignoring proximity loss—planar looks great in DC but runs hot at HF.
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Transformer isolation stack-up fails PD/hipot due to an overlooked margin or via clearance.
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CM choke saturates under inrush (or DC bias in bridgeless topologies).
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Oversized Y-caps blowing leakage current limits for charging standards.
Deliverables I can provide next
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A quick PFC/LLC magnetic pre-size sheet (inputs: power, Vin range, Vbat range, f_sw).
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Planar stack-up sketch with interleaving order and expected leakage.
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EMI filter first-cut (CM/DM) for your target power and switching frequency.

